Hardware Lab Manager

Cspeed

Location
Palo Alto, CA
Employment type
unknown
Posted
Posted
  • Lab

About the role

CScale is a startup backed by Sutter Hill Ventures and Atreides Capital - headquartered in Palo Alto, CA. Our executive team has a demonstrated track record of building and scaling category-defining semiconductor and infrastructure businesses at companies like Broadcom, Lumentum, Tesla, Apple, Samsung, Intel, and VMware. CScale is developing next-generation optical semiconductor solutions for the AI infrastructure market, focused on enabling true “scale-up” architectures. Our mission is to replace traditional copper interconnects with advanced fiber-optic technologies that overcome the limitations of existing optics solutions and architectures. The Role The lab is where our product stops being a design and starts being real. You will own it — the physical lab and its expansion, the test and validation work that happens in it, and the boards that everything gets tested on. Almost every team here needs boards (CMOS bring-up vehicles, packaging test structures, optics characterization fixtures, systems validation boards) and this would roll up under you. The engineers who define requirements stay in their own lanes; you turn their requirements into hardware that works the first time. This is hands-on — schematics, layout review, and bench time during bring-up — and it is also leadership. You will build the lab team and lead senior technical ICs. Our near-term board focus is from evaluation through production, and you will own this too. What You Will Own The Lab Lead lab expansion: space planning, bench and rack layout, power, cooling, ESD control, and fiber and cable infrastructure Own the capital equipment budget and roadmap — specify, justify, source, and bring up BERTs, high-bandwidth scopes, VNAs, optical spectrum and power measurement, thermal chambers, probe stations, and fixturing Run lab operations: asset and calibration tracking, instrument scheduling, configuration control of test setups, and lab safety around high-power optical sources and high-current supplies Test & Validation Own test and validation for our optical engines across EVT, DVT, and PVT — the validation plan, the test matrix, and the entry and exit criteria that gate each build phase Ensure measurements are defensible: repeatability, calibration, de-embedding, stated uncertainty, and correlation between setups and between sites Lead bring-up and debug of new hardware revisions, and drive failures to root cause across electrical, optical, thermal, firmware, and test-setup causes Own the characterization reports and compliance evidence that go to customers and into program reviews Board Design Be the single point of accountability for board requirements across CMOS, packaging, optics, and systems — running intake, pushing back on requirements that will not build, and setting the standards, libraries, and review process Own the full flow: requirements, architecture, schematic capture, stackup and constraints, layout direction and review, fab and assembly, and bring-up — designing the boards that matter most yourself Deliver ASIC and package bring-up vehicles: socketed and BGA test boards, interposer and package test structures, probe and debug access, and the power and clocking around them Own SI and PI: stackup and material selection, via and breakout design, connector and package transitions, loss and crosstalk budgets, and PDN design for high-current digital and low-noise optical rails Design de-embeddable high-speed characterization and compliance fixtures, and take the product boards from concept through production as the program matures Manage external layout resources, fab houses, and assembly partners — quality, cost, turn time, yield, DFM and DFT Automation & Team <span data-ccp-props="{"33

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