SiFive
- Applicant tracking system
- Hiring via freehire
Open roles (72)
- Senior Security Engineer, CPU and Platform Security Validation
Hsinchu, tw · full time · posted
- Principal Field Application Engineer
Shanghai, cn · posted
- System Validation Engineer (New Grads)
Hsinchu, tw · posted
- Senior Design Verification Engineer – CPU Core Verification (Vector)
Austin, us · posted
- Staff Design Verification Engineer – Coherent Interconnect (CHI)
Boston, us · posted
- Staff Design Verification Engineer – CPU Core Verification (Vector)
Austin, us · posted
- Staff Design Verification Engineer – CPU Core Verification (ALU)
Austin, us · posted
- Staff Design Verification Engineer – CPU Core Formal Verification
Austin, us · posted
- Sr. Staff AI System Software Engineer
Hsinchu, tw · posted
- Engineer II, Physical Design
Bengaluru, in · posted
- Engineer II, Physical Design - Cores
Bengaluru, in · internship · posted
- Senior Engineer, Physical Design - Interconnects
Bengaluru, in · posted
- Senior Design Verification Engineer
Hyderabad, in · posted
- Senior Principal Engineer, Physical Design Methodology & RTL-to-GDS Architecture
Bengaluru, in · posted
- Staff Design Verification
Hyderabad, in · posted
- Senior CPU Design Verification Engineer
Hyderabad, in · posted
- Sr. Staff Engineer - Design Verification
Hyderabad, in · posted
- Staff Design Verification Engineer
Hyderabad, in · posted
- Design Verification Infrastructure Engineer - Platform
Santa Clara, us · posted
- Staff Design Verification Engineer – Coherent Interconnect
Austin, us · posted
- Technical Program Manager
Bengaluru, in · posted
- Senior Full Stack Engineer
Hsinchu, tw · posted
- Technical Program Manager
Bengaluru, Hsinchu, in, tw · posted
- Senior DevOps & Backend Engineer
Hyderabad, in · posted
- Principal Design Verification Engineer – CPU Coherent Interconnect
Santa Clara, us · posted
- Interconnect Design Engineer
Hsinchu, tw · posted
- Staff RTL Design Engineer
Hsinchu, tw · posted
- Senior Design Verification Engineer – High Performance CPU Core
Austin, us · posted
- Staff System Validation Engineer
Hsinchu, tw · posted
- Staff Design Verification Engineer – High Performance CPU Core
Austin, us · posted
- Staff Design Verification Engineer – Cache Verification
Hsinchu, tw · posted
- Senior Design Verification Engineer – Cache Verification
Hsinchu, tw · posted
- Sr. Staff Functional Safety Engineer
United Kingdom, gb · posted
- Linux Kernel Architect
us · posted
- Senior Staff Software Quality Assurance Engineer
Hsinchu, tw · posted
- Principal Design Verification Engineer – CPU Core Frontend
Austin, us · posted
- Principal Design Verification Engineer – CPU Subsystem Power Management
Austin, us · posted
- Principal Design Verification Engineer – CPU Core Hardware Prefetch
Austin, us · posted
- Principal Design Verification Engineer – CPU Core LSU
Austin, us · posted
- Design Verification Engineer to Staff Engineer (Unit Level Test)
Hsinchu, tw · posted
- CPU Design Verification Engineer
Hyderabad, in · posted
- Senior Design Verification Infrastructure Engineer - VIPs and Testbench
Bengaluru, in · posted
- Senior / Staff Design Verification Engineer
Ahmedabad, in · posted
- Sr. Staff Hardware Design Engineer
La Ciotat, fr · posted
- Senior Staff Design Verification Engineer – Coherent Interconnect
Boston, us · posted
- Staff Engineer - Design Verification
Hyderabad, in · posted
- Staff System Software Engineer
Hsinchu, tw · posted
- System Software Engineer
Hsinchu, tw · posted
- Staff Engineer - Formal Verification
Bengaluru, in · posted
- Debug/Trace/Profiling Design Engineer
La Ciotat, fr · posted
- Lead Debug/Trace/Profiling Design Engineer
La Ciotat, fr · posted
- Performance benchmarking and Infrastructure Engineer to Senior Engineer
Hsinchu, tw · posted
- Staff Design Verification Engineer
Hsinchu, tw · posted
- Staff Design Verification Infrastructure Engineer - VIPs and Testbench
Bengaluru, in · posted
- Intern - Design Verification Infrastructure Engineer - Platform
Santa Clara, us · internship · posted
- Staff Design Verification Engineer – Coherent Interconnect
Boston, us · posted
- Staff Design Verification Engineer – Coherent Interconnect
Austin, Boston, us · posted
- Principal Design Verification Engineer – High Performance CPU Subsystem
Austin, us · posted
- Senior Verification Engineer
Hsinchu, tw · posted
- Staff Software Engineer, AI/ML Heterogeneous Systems
Hsinchu, tw · posted
- Senior Software Engineer, Algorithms and Libraries of AI/ML/DSP
Hsinchu, tw · posted
- RTL Design Engineer
Hsinchu, tw · posted
- System Validation Engineer to Staff Engineer
Hsinchu, tw · posted
- Staff Verification Engineer
Austin, us · posted
- Java VM Software Performance Analysis Engineer
Hsinchu, tw · posted
- Workload / Performance Model Lead
Santa Clara, us · posted
- Sr. Design Verification Infrastructure Engineer - Build
Bengaluru, in · posted
- Design Verification Infrastructure Engineer - Software
Hsinchu, tw · posted
- Senior RTL Design Engineer - Cache Subsystem
Hsinchu, tw · posted
- Senior Design Verification Engineer
Hsinchu, tw · posted
- Performance Architect
Hsinchu, tw · posted
- AI/ML Software Engineer
Hsinchu, tw · posted
Vacancies are read from SiFive's own freehire board. JobForge is not the employer and does not process applications.